Packaging of the ULSI chip is one of the most important steps in ULSI manufacturing, contributing significantly to the overall cost, performance and reliability of the packaged chip. As semiconductor devices reach higher levels of integration, packaging technologies such as chip bonding have become critical. Packaging of the chip accounts for a considerable portion of the cost of producing the device and failure of the package leads to costly yield reduction.
One of the major problems leading to package failure in UBM formation are caused by the requirement for high temperature thermal treatments and compatibility of materials to withstand high temperature thermal treatments, for example during a curing or a solder reflow process. For example, in flip chip technology chip bonding is accomplished by means of solder bumps formed on under bump metallurgy (UBM) layers overlying a chip bonding pad where, frequently, high thermal treatments necessary to achieve solder reflow can lead to damage if underlying organic materials.
One problem with prior art UBM formation processes is the tendency of the polymer layer 14 to become detached and peel in subsequent processes or following a wet stripping process to remove the photoresist, for example dry film photoresist, used the photolithographic patterning and etching process to pattern the UBM system layers.
There is therefore a need in the semiconductor processing art to develop an improved solder bump formation process whereby peeling of the passivation layer is avoided to improve a process wafer yield and improve the reliability a solder bump (ball) formation process.
It is therefore an object of the invention to provide an improved solder bump formation process whereby peeling of passivation layer is avoided to improve a process wafer yield and improve the reliability a solder bump (ball) formation process, while overcoming other shortcomings and limitations of the prior art.